The present invention relates to a key input circuit for use in electronic equipment or appliances, such as electronic desk calculators.
The key input circuit is used as the input circuit of an electronic desk calculator, an electronic typewriter or the like electronic equipment, and is usually composed of a plurality of push-button switches. Desired key information is inputted to the electronic equipment by sequentially manipulating the push-button switches.
FIG. 1 shows an example of a prior art key input circuit which was proposed by the present inventors. In the figure, PG designates a timing pulse generator which transmits a plurality of series of timing pulses DT1-DT10 successively shifted on phase on its respective output lines. Shown at KB.sub.1 and KB.sub.2 are key blocks by which groups of, for example, numeral key signals and function key signals are formed. A plurality of keys, not shown in this figure, within the key blocks KB.sub.1 and KB.sub.2 are respectively connected to outputs of the timing pulse generator PG. Read control circuits RC.sub.1 and RC.sub.2 receive outputs of the keyboards KB.sub.1 and KB.sub.2 as their inputs, respectively, and receive the outputs of the timing pulse generator PG as synchronization control signals. An encoder EC converts the outputs of the read control circuits RC.sub.1 and RC.sub.2 into, for example, combinations of signals representing binary numbers. A memory circuit M stores the outputs of the encoder EC.
IC indicates an integrated semiconductor device, part of which is constituted of the timing pulse generator PG, the read control circuits RC.sub.1 and RC.sub.2, the encoder EC and the memory circuit M. P.sub.01 - P.sub.0n represent output terminals of the integrated semiconductor circuit, and P.sub.i1 and P.sub.i2 represent input terminals thereof. The operation of the key input circuit thus constructed will be briefly explained below.
Information as to, for example, which keys in the key block KB.sub.1 have been depressed is represented by timing pulses, which timing pulses are multiplexed on one line and are fed to the read control circuit RC.sub.1. On the basis of the timing pulses, the read control circuit RC.sub.1 distinguishes which depressed keys the multiplexed key signals correspond to. The key information restored by the read control circuits RC.sub.1 and RC.sub.2 in this way are coded into binary numbers by the encoder EC. The coded key information is stored in the memory circuit M.
According to the key input circuit thus described, the number of the input terminals P.sub.i1 and P.sub.i2 from the keys to the integrated semiconductor circuit IC can be made remarkably smaller as compared with the number of keys.
Here, if the number of timing pulse series is increased a larger number of key information signals can be multiplexed. That is, since a timing pulse must be applied to each key in the system of the type disclosed in FIG. 1, in order to increase the number of keys it was previously required to increase the number of timing pulses in each series. The timing pulses, however, are not exclusively used for the key input circuit, but are mainly used as indication digit switching signals in the case of performing dynamic indication in an associated display device, for example, as seen in U.S. Pat. No. 3,715,746. When the number of timing pulse series is increased only for use in the key input circuit, the number of timing pulses employed becomes larger than the number of indication digits. Thus, if the number of timing signals exceeds the number of indicator lamps in the display device, it might be necessary to control the number of indicator lamps by more than one timing signal or to control the respective lamps by nonconsecutive timing singals, either of which conditions would result in a flickering of the display lamp. As a result, the indication is intermittently effected, and it becomes extremely unstable and produces a flickering appearance to the eyes. Accordingly, it is also undesirable from the aspect of arithmetic control if the number of timing pulse series is increased only for the purpose of multiplexing a larger number of key information signals. Further, when the number of timing pulse series is increased, the number of the external output terminals P.sub.0l - P.sub.0n of the integrated circuit must be increased on account of the necessity for supplying a different series of timing pulses to each of the keys. However, it is extremely difficult to increase the number of terminals in an integrated circuit.
In this respect, with the circuit shown in FIG. 1, a plurality of keys are classified into relatively few key blocks, and the read control circuits are connected to the respective blocks, whereby a large number of key information signals are represented with a small number of timing pulse series.